The explosive growth of artificial intelligence and high-performance computing is placing unprecedented demands on data center infrastructure, forcing a fundamental redesign of power delivery architectures. As generative AI models scale in complexity, the hardware driving them—namely advanced graphics processing units and AI accelerators—requires staggering amounts of electrical energy. This escalating power consumption has pushed traditional silicon-based power management devices to their practical limits, opening the door for gallium nitride (GaN) technology to become the cornerstone of next-generation efficiency and power density.
Addressing industry leaders at the EE Power Asia 2026 Spark Session, executives from Efficient Power Conversion (EPC) detailed the immense engineering pressures facing modern hyperscale data centers. Alex Lidow, CEO of EPC, and Jason Zhang, vice president of DC/DC marketing and system engineering, explained that conventional silicon power semiconductors can no longer keep pace with the hyper-acceleration of GPU power demands. The mismatch between silicon’s physical evolution and the rapid scaling of AI workloads has transformed power management from a background utility into a critical bottleneck for data center operators worldwide.
AI Architectures Driving Power Redesign
The architectural transformation begins at the silicon level. According to Zhang, modern AI accelerators have witnessed a dramatic fourfold increase in power consumption across just three consecutive GPU generations. Looking ahead over the next two years, industry projections indicate that individual GPUs will dissipate as much as 5 kilowatts of thermal energy while operating at core voltages dropping below 1 volt. To deliver the necessary power under these ultra-low voltage conditions, current levels must approach an extraordinary 10,000 amperes per processor.
When scaled across clusters housing hundreds or thousands of interconnected GPUs, the energy footprint of a single facility expands dramatically. Zhang noted that individual data centers are rapidly scaling toward the gigawatt threshold, shifting the entire paradigm of how power must be delivered, managed, and dissipated.
To handle these extreme loads, electrical energy must travel through multiple complex stages of power conversion. The journey begins with standard incoming 480-volt three-phase alternating current, which is stepped up to an 800-volt direct current distribution bus. From there, the power is broken down into intermediate voltages, such as 12 volts or 6 volts, before ultimately reaching the sub-1-volt core voltage required by the GPU. Each individual conversion stage must handle exceptionally high currents, minimize electrical losses, and fit within the strictly limited physical boundaries of server boards.
The transition to AI-centric infrastructure is similarly reshaping power distribution topologies inside hyperscale server racks. Lidow pointed out that legacy architectures—which historically routed AC power directly into server racks—are quickly being replaced by centralized sidecar power systems. These modern systems feed an 800-volt DC bus directly into each rack, shifting the primary power conversion steps directly onto the server board itself. This approach eliminates bulky power supply drawers, slashes energy distribution losses, and optimizes the physical layout of the hardware.
Under this new paradigm, the rack receives an 800-volt input rather than AC power, which must then be progressively stepped down to 0.7, 0.6, or 0.5 volts for the GPU core. Although distributing power at higher voltages successfully reduces the magnitude of current flowing into the server, the final conversion stages near the processor must still handle thousands of amperes. This places immense pressure on power converters to achieve unprecedented levels of efficiency and power density simultaneously.
Lidow frequently refers to server board space as the most expensive real estate in the world, underscoring why power density is just as vital as electrical efficiency. By increasing the switching frequency of power converters, engineers can significantly reduce the physical size of magnetic components. This reduction frees up critical board space, allowing essential power conversion circuitry to fit within the confined real estate immediately surrounding high-performance AI processors.
Silicon Approaches Its Limits
The push toward higher frequencies and denser layouts highlights the growing obsolescence of traditional silicon MOSFET technology for advanced AI infrastructure. Both speakers emphasized that silicon has largely reached its theoretical performance ceiling, particularly regarding on-resistance. While silicon semiconductors have enjoyed decades of incremental refinement, achieving further gains has become exceedingly difficult, creating a widening gap with the accelerating demands of modern AI hardware.
Zhang explained that traditional silicon technology typically yields performance improvements of only about 20 percent per generation. In the fast-moving landscape of artificial intelligence, such incremental progress is simply inadequate to keep pace with the exponential growth of processor power requirements.
In stark contrast, GaN power devices continue to advance at a rapid pace. EPC’s seventh-generation platform exemplifies this trajectory, introducing significantly lower on-resistance and reduced gate charge across both higher-voltage components and a newly introduced family of low-voltage products ranging from 18 volts to 40 volts. These low-voltage devices are specifically engineered to handle the multiple intermediate and point-of-load conversion stages packed tightly inside modern AI servers.
The reduction in gate charge inherent to advanced GaN technology allows devices to switch at much higher frequencies without incurring excessive thermal penalties. Zhang noted that EPC’s Gen 7 devices are capable of switching efficiently at approximately 3 megahertz in synchronous buck converters. This operating frequency is roughly triple what can be typically achieved by comparable silicon-based implementations. Looking further ahead, the company’s technology roadmap targets switching speeds approaching 10 megahertz, which will enable current densities of roughly 5 amperes per square millimeter to support future AI processors requiring 10,000 amperes of current.
GaN Expands Throughout the Server
As the industry adapts to these realities, Lidow anticipates that gallium nitride will find a home across virtually every power conversion socket inside future AI servers. While GaN is already established in today’s 48-volt input stages, the ongoing migration toward 800-volt distribution and lower intermediate buses means the technology is expanding into new territories. These include 800-volt input converters, intermediate bus converters, and highly regulated point-of-load supplies.
Lidow emphasized that lower-voltage conversion stages demand substantially more semiconductor silicon or wide-bandgap area because electrical current increases as voltage decreases. Consequently, the adoption of GaN is accelerating sharply as power conversion moves physically closer to the GPU core, creating what he described as a wave of GaN deployment washing across the server card.
Addressing historical industry concerns regarding manufacturing capacity and supply chain maturity, Zhang asserted that scalability is no longer a limiting factor for GaN adoption. Unlike silicon carbide, which often requires specialized production lines, GaN devices are successfully fabricated on standard silicon substrates using largely conventional semiconductor manufacturing equipment, supplemented by specialized epitaxial growth processes. Furthermore, EPC relies on a diversified ecosystem of partners spanning wafer fabrication, rigorous testing, packaging, and global logistics to ensure a robust supply chain.
Reliability has also matured dramatically over nearly two decades of commercial development and field deployment. Rather than relying exclusively on traditional semiconductor qualification standards, EPC evaluates GaN devices based on how they perform within real-world application circuits. By identifying intrinsic failure mechanisms and continually refining device designs and manufacturing processes, the company has successfully eliminated historical vulnerabilities.
Zhang noted that the primary variables influencing field reliability are often external factors on the customer side, such as thermal interface management, printed circuit board mounting techniques, and heatsink attachment methods, rather than the intrinsic reliability of the semiconductor die itself. Building on this, Lidow highlighted that EPC’s GaN products have already accumulated eight years of continuous deployment inside demanding AI data center cards, demonstrating phenomenal operational reliability in the field.
Beyond raw processor performance and electrical reliability, the executives stressed that GaN plays an increasingly vital role in controlling the escalating operating costs of modern data centers. Hyperscale operators are shifting their evaluation metrics toward total facility efficiency rather than focusing solely on compute performance. Even modest efficiency gains in power conversion can translate into substantial reductions in electricity consumption, cooling infrastructure requirements, and water usage across massive, gigawatt-scale AI facilities.
Zhang pointed out that implementing GaN technology can easily improve overall power conversion efficiency by up to 5 percent across the entire chain from incoming AC power to the processor core. In the context of gigawatt-scale operations, a 5 percent efficiency gain represents a massive reduction in operating expenditures and energy waste. These environmental and economic considerations are expected to gain even greater prominence as regulatory scrutiny intensifies around the resource consumption of large-scale AI infrastructure.
Looking toward the future, Lidow expects AI power architectures to continue their evolutionary trajectory toward higher distribution voltages and refined intermediate bus standards. While an 800-volt distribution bus is rapidly becoming the baseline for new data center deployments, future generations of AI hardware may demand primary buses operating at 1,200 volts, 1,500 volts, or even 2,000 volts, supported by advanced multilevel converter topologies. Intermediate buses are simultaneously projected to shift from 12 volts down toward 6 volts prior to direct GaN conversion stages that supply sub-1-volt core power to the GPU.
Within EPC, engineering development is shifting away from discrete transistors toward increasingly integrated GaN power integrated circuits. Lidow noted that the industry has largely extracted all possible performance gains from discrete GaN components, signaling a strategic shift toward monolithic integration for future product generations. As switching speeds continue to climb, integration will become essential for implementing distributed gate drivers, monolithic power stages, and advanced functional capabilities that cannot be realized through discrete component designs alone.
Lidow concluded that as computational demands continue their relentless ascent, gallium nitride is well-positioned to cement its status as the dominant semiconductor technology for server power management, ultimately capturing every power conversion socket on the modern AI server card.
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